With the increasing down-scaling of integrated circuits and increasingly demanding requirements to the speed of integrated circuits, transistors need to have higher drive currents with smaller dimensions. Fin Field-Effect Transistors (FinFETs) were thus developed. FinFETs have increased channel widths. The increase in the channel widths is achieved by forming channels that include portions on the sidewalls of semiconductor fins and portions on the top surfaces of the semiconductor fins. Since the drive currents of transistors are proportional to the channel widths, the drive currents of the FinFETs are increased.
In an existing FinFET formation process, Shallow Trench Isolation (STI) regions are first formed in a silicon substrate. The portion of the silicon substrate between STI regions may be replaced with semiconductor materials such as silicon germanium, III-V compound semiconductor, or the like. The STI regions are then recessed to form semiconductor fins, which comprise portions of the semiconductor material that are over the recessed STI regions. Next, a gate dielectric, a gate electrode, and source and drain regions are formed to finish the formation of the FinFET.
The formation of the semiconductor fins includes a plurality of etching and cleaning processes. As a result, dangling bonds are generated on the surfaces of the semiconductor fins. The dangling bonds result in the increase in the Density of Interfacial States (Dit), and in turn results in the degradation in carrier mobility and the drive currents of the resulting FinFETs.